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general description the lm75 temperature sensor includes a delta-sigma analog-to-digital converter, and a digital overtempera- ture detector. the host can query the lm75 through its i 2 c interface to read temperature at any time. the open-drain overtemperature output (os) sinks current when the programmable temperature limit is exceeded. the os output operates in either of two modes, com- parator or interrupt. the host controls the temperature at which the alarm is asserted (t os ) and the hysteresis temperature below which the alarm condition is not valid (t hyst ). also, the lm75? t os and t hyst regis- ters can be read by the host. the address of the lm75 is set with three pins to allow multiple devices to work on the same bus. power-up is in comparator mode, with defaults of t os = +80? and t hyst = +75?. the 3.0v to 5.5v supply voltage range, low supply current, and i 2 c interface make the lm75 ideal for many applica- tions in thermal management and protection. applications thermal system management thermal protection test equipment computers and office electronics features ? so (sop) and ?ax (?op) packages ? i 2 c bus interface ? separate open-drain os output operates as interrupt or comparator/thermostat input ? register readback capability ? power-up defaults permit stand-alone operation as a thermostat ? 3.0v to 5.5v supply voltage ? low operating supply current 250? (typ), 1ma (max) ? 4? (typ) shutdown mode minimizes power consumption ? up to eight lm75s can be connected to a single bus ? pin- and/or register-compatible with improved- performance maxim sensors including max7500, max6625, max6626, ds75lv, and ds7505 lm75 digital temperature sensor and thermal watchdog with 2-wire interface ________________________________________________________________ maxim integrated products 1 functional diagram ordering information/selector guide 19-4385; rev 0; 3/09 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. ?ax is a registered trademark of maxim integrated products, inc. note: devices are specified over the -55? to +125? temperature range and include i 2 c noise filter. + denotes a lead(pb)-free/rohs-compliant package. t&r = tape and reel. part pin-package pkg supply voltage (v) top mark lm75bim-3+ 8 so (sop) bulk 3.3 lm75bim-3 lm75bimx-3+ 8 so (sop) t&r 3.3 lm75bim-3 lm75bimm-3+ 8 ?ax (?op) bulk 3.3 t01b lm75bimmx-3+ 8 ?ax (?op) t&r 3.3 t01b lm75bim-5+ 8 so (sop) bulk 5.0 lm75bim-5 lm75bimx-5+ 8 so (sop) t&r 5.0 lm75bim-5 lm75bimm-5+ 8 ?ax (?op) bulk 5.0 t00b lm75bimmx-5+ 8 ?ax (?op) t&r 5.0 t00b os sda scl a0 a1 a2 +v s = 3.0v to 5.5v silicon bandgap temperature sensor 9-bit delta- sigma adc configuration register tos set point register t hyst set point register set point comparator w/ hysteresis 2-wire interface pointer register 88 16 16 16 16 16 8 3 1 2 4 7 6 5 1 + 2 3 4 8 7 6 5 +v s a0 a1 a2 gnd os scl sda lm75 max ( sop), so top view pin configuration
lm75 digital temperature sensor and thermal watchdog with 2-wire interface 2 _______________________________________________________________________________________ absolute maximum ratings (note 1) electrical characteristics (+v s = +3.0v to +5.5v, unless otherwise noted. temperature accuracy specifications apply for +v s = 3.3v for versions with ?3?in the suffix and for +v s = 5v for versions with ?5?in the suffix. t a = -55? to +125?, unless otherwise noted. typical values are at +v s = +5v, t a = +25?.) (notes 4, 5) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. +v s to gnd ...........................................................-0.3v to +6.0v os, sda, scl to gnd...........................................-0.3v to +6.0v all other pins to gnd .................................-0.3v to (+v s + 0.3v) input current at any pin (note 2)..........................................5ma package input current (note 2)..........................................20ma os output sink current ......................................................10ma continuous power dissipation (t a = +70?) (note 3) 8-pin ?ax (?op) (derate 4.5mw/? above +70?) ..................................362mw 8-pin so (sop) (derate 5.9mw/? above +70?) ........471mw junction-to-case thermal resistance ( jc ) (note 3) 8-pin ?ax (?op) .......................................................42?/w 8-pin so (sop)..............................................................40?/w junction-to-ambient thermal resistance ( ja ) (note 3) 8-pin ?ax (?op) .....................................................221?/w 8-pin so (sop)............................................................170?/w esd protection human body model (r d = 1.5k , c s = 100pf) all pins to gnd .................................................................?kv operating temperature range .........................-55? to +125? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? parameter symbol conditions min typ max units -25? t a +100? -2.0 +2.0 accuracy (six-sigma) -55? t a +125? -3.0 +3.0 ? -25? t a +100? -1.5 +1.5 accuracy (three-sigma) (note 6) -55? t a +125? -2.0 +2.0 ? resolution 9 bits temperature conversion time (note 7) 100 300 ms i 2 c inactive 0.25 0.5 ma shutdown mode, +v s = 3v 4 quiescent supply current shutdown mode, +v s = 5v 6 ? +v s supply voltage range 3.0 5.5 v os output saturation voltage i out = 4.0ma (note 8) 0.8 v os delay (note 9) 1 6 conver- sions os output fall time t of c l = 400pf, i o = 3ma (note 10) 250 ns t os default temperature (note 11) 80 ? t hyst default temperature (note 11) 75 ? note 1: absolute maximum ratings indicate limits beyond which damage to the device may occur. dc and ac electrical specifica- tions do not apply when operating the device beyond its rated operating conditions. note 2: when the input voltage (v i ) at any pin exceeds the absolute maximum ratings limits (v i < gnd, v i > 6v or v i > +v s ), the current at that pin should be limited to 5ma. the 20ma maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 5ma to four. note 3: package thermal resistances were obtained using the method described in jedec specification jesd51-7, using a single- layer board. for detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial .
lm75 digital temperature sensor and thermal watchdog with 2-wire interface _______________________________________________________________________________________ 3 parameter symbol conditions min typ max units logic (sda, scl, a0, a1, a2) input high voltage v ih +v s x 0.7 +v s + 0.5 v input low voltage v il -0.3 +v s x 0.3 v input high current i ih v in = 5v 0.005 1.0 ? input low current i il v in = 0v -1.0 -0.005 ? input capacitance c in all digital inputs 20 pf output high current v oh = 5v 10 ? output low voltage i ol = 3ma 0.4 v i 2 c-compatible timing (notes 12, 13) (clock) scl period t scl bus timeout inactive 2.5 ? data in setup time to scl high t su:dat 10% of sda to 10% of scl 100 ns data out stable after scl low t hd:dat 10% of scl to 10% of sda 0 s start condition setup time (sda low to scl low) t su:sta 90% of scl to 90% of sda 100 ns stop condition hold time t hd:sto 100 ns sda time low for reset of serial interface t timeout (note 14) 75 325 ms electrical characteristics (continued) (+v s = +3.0v to +5.5v, unless otherwise noted. temperature accuracy specifications apply for +v s = 3.3v for versions with ?3?in the suffix and for +v s = 5v for versions with ?5?in the suffix. t a = -55? to +125?, unless otherwise noted. typical values are at +v s = +5v, t a = +25?.) (notes 4, 5) note 4: all parts operate properly over the 3v to 5.5v supply voltage range. the devices are tested and specified for rated accuracy at their nominal supply voltage. note 5: all parameters are measured at t a = +25?. values over the temperature range are guaranteed by design. note 6: there is no industry-wide standard for temperature accuracy specifications. maxim? standard is six-sigma. the three- sigma specification is included to allow easier comparison to products built by manufacturers who use different standards. note 7: this specification indicates how often temperature data is updated. the devices can be read at any time without regard to conversion state, while yielding the last conversion result. note 8: for best accuracy, minimize output loading. higher sink currents can affect sensor accuracy due to internal heating. note 9: os delay is user programmable up to 6 over-limit conversions before os is set to minimize false tripping in noisy environ- ments. note 10: guaranteed by design. note 11: default values set at power-up. note 12: all timing specifications are guaranteed by design. note 13: unless otherwise noted, these specifications apply for +v s = +5vdc for lm75bim-5 and lm75bimm-5 and +v s = +3.3vdc for lm75bim-3 and lm75bimm-3. c l (load capacitance) on output lines = 80pf, unless otherwise specified. the switching characteristics of the lm75 fully meet or exceed the published specifications of the i 2 c bus. these parame- ters are the timing relationships between scl and sda signals related to the lm75. they are not i 2 c bus specifications. note 14: holding the sda line low for a time greater than t timeout causes the device to reset sda to the idle state of the serial bus communication (sda set high).
quiescent supply current vs. temperature lm75 toc01 temperature ( c) quiescent supply current ( a) 95 65 35 5 -25 240 250 260 270 280 290 300 230 -55 125 +v s = +5v +v s = +3v shutdown supply current ( a) 1 2 3 4 5 6 0 shutdown supply current vs. temperature lm75 toc02 temperature ( c) 95 65 35 5 -25 -55 125 +v s = +5v +v s = +3v accuracy vs. temperature accuracy ( c) -1.5 -1.0 -0.5 0 0.5 1.0 1.5 2.0 -2.0 lm75 toc03 temperature ( c) 95 65 35 5 -25 -55 125 4 typical parts typical operating characteristics (t a = +25?, unless otherwise noted.) lm75 digital temperature sensor and thermal watchdog with 2-wire interface 4 _______________________________________________________________________________________ pin description pin name function 1 sda serial-data input/output line. open drain. connect sda to a pullup resistor. 2 scl serial clock input. open drain. connect scl to a pullup resistor. 3 os overtemperature shutdown output. open drain. connect os to a pullup resistor. 4 gnd ground 5a2 2-wire interface address input. connect a2 to gnd or +v s to set the desired i 2 c bus address. do not leave unconnected (see table 1). 6a1 2-wire interface address input. connect a1 to gnd or +v s to set the desired i 2 c bus address. do not leave unconnected (see table 1). 7a0 2-wire interface address input. connect a0 to gnd or +v s to set the desired i 2 c bus address. do not leave unconnected (see table 1). 8+v s positive supply voltage input. bypass to gnd with a 0.1? bypass capacitor.
detailed description the lm75 temperature sensor measures temperature and converts the data into digital form using a band- gap type temperature sensor and a 9-bit delta-sigma adc. an i 2 c-compatible 2-wire serial interface allows access to conversion results. the lm75 accepts stan- dard i 2 c commands to read the data, set the overtem- perature alarm (os) trip thresholds, and configure other characteristics. while reading the temperature register, any changes in temperature are ignored until the read is completed. the temperature register is updated for the new temperature measurement upon completion of the read operation. os output, t os, and t hyst limits in comparator mode (see figure 1), the open-drain os output asserts when the temperature rises above the limit programmed into the t os register, and becomes high impedance when the temperature falls below the limit set in the t hyst register. in this mode the lm75 operates as a thermostat, and the os output can be used to take action to reduce the temperature (e.g., turn on a cooling fan, reduce clock speed, or shut down the system). in interrupt mode, exceeding t os also asserts os. os remains asserted until a read operation is performed on any of the registers. once os has asserted due to crossing above t os and is then reset, it is asserted again only when the temperature drops below t hyst . the output then remains asserted until it is reset by a read. it is then asserted again if the temperature rises above t os , and so on. putting the lm75 into shutdown mode also resets os. power-up and power-down the lm75 powers up to a known state, as indicated in table 2. some of these settings are summarized as fol- lowing: ?comparator mode ?t os = +80? ?t hyst = +75? ?os active low ?command byte pointer = 0x00 i 2 c-compatible bus interface from a software perspective, the lm75 appears as a set of byte-wide registers that contain temperature data, alarm threshold values, and control bits. a standard i 2 c- compatible, 2-wire serial interface reads temperature data and writes control bits and alarm threshold data. each device responds to its own i 2 c slave address, which is selected using a0, a1, and a2. see table 1. lm75 digital temperature sensor and thermal watchdog with 2-wire interface _______________________________________________________________________________________ 5 t os t hyst os output (comparator mode) os set active low os output (interrupt mode) os set active low read operation read operation read operation temperature figure 1. os output temperature response diagram bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 1 0 0 1 a2a1a0r/ w table 1. slave address register name address (hex) por state (hex) por state (binary) por state ( c) read/ write temperature 00 000x 0000 0000 0xxx xxxx read only configuration 01 00 0000 0000 r/w t hyst 02 4b0x 0100 1011 0xxx xxxx 75 r/w t os 03 500x 0101 0000 0xxx xxxx 80 r/w table 2. register functions x = don? care.
lm75 digital temperature sensor and thermal watchdog with 2-wire interface 6 _______________________________________________________________________________________ t buf t su:sto t hd:sta t su:sta t hd:dat t high t low t su:dat t hd:sta scl sda t f t r acknowledge (a) stop condition (p) start condition (s) start condition (s) repeated start condition (sr) parameters are measured from 10% to 90%. figure 2. serial bus timing upper byte lower byte d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 sign bit 1= negative 0 = positive msb 64 c 32? 16? 8? 4? 2? 1? lsb 0.5? xxxxxxx table 3. temperature, t hyst , and t os register definition x = don? care. x = don? care. digital output temperature (?) binary hex +125 0111 1101 0xxx xxxx 7d0x +25 0001 1001 0xxx xxxx 190x +0.5 0000 0000 1xxx xxxx 008x 0 0000 0000 0xxx xxxx 000x -0.5 1111 1111 1xxx xxxx ff8x -25 1110 0111 0xxx xxxx e70x -55 1100 1001 0xxx xxxx c90x table 4. temperature data output format 0111 1101 0 0001 1001 0 0000 0000 1 0000 0000 0 1111 1111 1 1110 0111 0 1100 1001 0 -55 -25 -0.5 0 +0.5 +25 +125 local binary output code (9msb) figure 3. temperature-to-digital transfer function
lm75 digital temperature sensor and thermal watchdog with 2-wire interface _______________________________________________________________________________________ 7 figure 4. i 2 c-compatible timing diagram (read) address byte address byte address byte address byte data byte (a) typical 2-byte read from preset pointer location such as temp, t high , t low . (b) typical pointer set followed by immediate read for 2-byte register such as temp, t high , t low . (c) typical 1-byte read from configuration register with preset pointer. most significant data byte least significant data byte pointer byte most significant data byte least significant data byte ack by lm75 ack by master ack by lm75 ack by lm75 ack by master ack by lm75 ack by master start by master start by master repeat start by master start by master stop cond by master stop cond by master stop cond by master no ack by master no ack by master no ack by master
lm75 digital temperature sensor and thermal watchdog with 2-wire interface 8 _______________________________________________________________________________________ address byte address byte address byte (a) typical pointer set followed by immediate read from configuration register (b) configuration register write (c) t high and t low write pointer byte pointer byte pointer byte most significant data byte least significant data byte configuration byte address byte data byte ack by lm75 ack by lm75 ack by lm75 ack by lm75 ack by lm75 ack by lm75 ack by lm75 start by master start by master start by master repeat start by master no ack by master stop cond by master ack by lm75 ack by lm75 stop cond by master stop cond by master ack by lm75 figure 5. i 2 c-compatible timing diagram (write)
temperature data format temperature data is stored in the temperature, t os set point, and t hyst set point registers. the temperature data format is 9 bits, two? complement, and the register is read out in 2 bytes: an upper byte and a lower byte. bits d15?7 contain the temperature data, with the lsb representing 0.5? and the msb representing the sign bit (see table 3). the msb is transmitted first. the last 7 bits of the lower byte, bits d6?0, are don? cares. shutdown set bit d0 in the configuration register to 1 to place the lm75 in shutdown mode and reduce supply current to 4?. in interrupt mode, entering shutdown resets the os output. while in shutdown, the i 2 c remains active and t os and t hyst limit registers along with the configuration register remain accessible to the master. fault queue the fault queue prevents os false tripping in noisy environments. the number of faults set in the queue (up to 6) must occur to trip the os output. comparator/interrupt mode the events that trigger os are identical between com- parator and interrupt modes. in comparator mode, os is asserted when the temperature rises above the t os value. os is deasserted when the temperature drops below the t hyst value. in interrupt mode, os is assert- ed when the temperature rises above the t os value or falls below the t hyst value. os is deasserted only after performing a read operation. os output the os output is an open-drain output without an inter- nal pullup. connect a pullup resistor from os to +v s . using larger resistance values reduces any tempera- ture errors due to self heating from current entering os. os polarity the os polarity can be programmed for active-low or active-high operation. in active-low operation, os goes low when triggered by a temperature event. internal registers the lm75? pointer register selects between four data registers (see figure 6). at power-up, the pointer is set to read the temperature register at address 0x00. the pointer register latches the last location to which it was set. all registers are read and write, except the temperature register, which is read only. write to the configuration register by writing an address byte, a data pointer byte, and a data byte. if 2 data bytes are written, the second data byte overrides the first. the t os and t hyst registers require 1 address byte, 1 pointer byte, and 2 data bytes. if only 1 data byte is written, it is saved in bits d15?8 of the respec- tive register. if more than 2 data bytes are written, only the first 2 bytes are recognized while the remaining bytes are ignored. read from the lm75 in one of two ways. if the location latched in the pointer register is set from the previous read, the new read consists of an address byte, fol- lowed by retrieving the corresponding number of data bytes. if the pointer register needs to be set to a new address, perform a read operation by writing an address byte, pointer byte, repeat start, and another address byte. an inadvertent 8-bit read from a 16-bit register, with the d7 bit low, can cause the device to stop in a state where the sda line is held low. ordinarily, this would prevent any further bus communication until the master sends nine additional clock cycles or sda goes high. at that time, a stop condition resets the device. if the additional clock cycles are not generated by the mas- ter, the lm75 bus resets and unlocks after the bus time- out period has elapsed. lm75 digital temperature sensor and thermal watchdog with 2-wire interface _______________________________________________________________________________________ 9 smbus is a trademark of intel corp. figure 6. block diagram lm75 +v s a2/reset a1 a0 sda scl os smbus interface block pointer register (selects register for communication) data address register select gnd temperature (read only) pointer = 0000 0000 t os set point (read/write) pointer = 0000 0011 t hyst set point (read/write) pointer = 0000 0010 configuration (read/write) pointer = 0000 0001
configuration register the 8-bit configuration register sets the fault queue, os polarity, shutdown control, and whether the os output functions in comparator or interrupt mode. when writing to the configuration register, set bits d7, d6, and d5 to zero (see table 5). bits d4 and d3, the fault queue bits, determine the number of faults necessary to trigger an os condition (see table 6). the number of faults set in the queue must occur consecutively to trip the os output. the fault queue prevents os false tripping in noisy environ- ments. set bit d2, the os polarity bit, to zero to force the os output polarity to active low. set bit d2 to 1 to set the os output polarity to active high. os is an open-drain output under all conditions and requires a pullup resis- tor to output a high voltage (see figure 1). set bit d1, the comparator/interrupt bit to zero to oper- ate os in comparator mode. in comparator mode, os is asserted when the temperature rises above the t os value. os is deasserted when the temperature drops below the t hyst value (see figure 1). set bit d1 to 1 to operate os in interrupt mode. os is asserted in inter- rupt mode when the temperature rises above the t os value or falls below the t hyst value. os is deasserted only after performing a read operation. set bit d0, the shutdown bit, to zero for normal opera- tion. set bit d0 to 1 to shutdown the lm75? internal blocks. the i 2 c interface remains active as long as the shutdown bit is set. the t os , t hyst , and configuration registers can still be written to and read from while in shutdown. applications information lm75 measures the temperature of its own die. the thermal path between the die and the outside world determines the accuracy of temperature measure- ments. most of the heat flows in to or out of the die through the leads. because of this, the lm75 most easi- ly measures the pcb temperature. for ambient temper- ature measurements, mount the lm75 on a separate pcb away from high power sources. temperature errors due to self heating of the lm75 die is minimal due to the low supply current. digital noise issues the lowpass filters in the scl and sda digital lines miti- gate the effects of bus noise, and make communica- tions in noisy environments more robust. good layout practices also help. keep switching power supplies away from digital lines, and arrange for high-speed dig- ital traces to cross scl and sda at right angles. properly terminate long pcb traces and bus traces connected to multiple slaves. serial bus no-acknowledge (which causes unnecessary bus traffic) is the most common symptom of excessive noise coupling into the sda and scl lines. noise with amplitude greater than the lm75? hysteresis (400mv p-p , typ), overshoot greater than 300mv above +v s , and undershoot more than 300mv below gnd may prevent successful serial communication. resistance can be added in series with the sda and scl lines to help filter noise and ringing. a 5k resistor placed in series with the scl line and as close as pos- sible to the scl pin, with the 5pf to 10pf stray capaci- tance of the device, provides a 6mhz to 12mhz lowpass filter, which is sufficient filtering in many cases. lm75 digital temperature sensor and thermal watchdog with 2-wire interface 10 ______________________________________________________________________________________ d7 d6 d5 d4 d3 d2 d1 d0 0 0 0 fault queue fault queue os polarity comparator/ interrupt shutdown table 5. configuration register definition d4 d3 number of faults 0 0 1 (por state) 01 2 10 4 11 6 table 6. configuration register fault queue bits
lm75 digital temperature sensor and thermal watchdog with 2-wire interface ______________________________________________________________________________________ 11 3v to 5.5v +v s os a0 a1 a2 scl sda gnd or +v to microcontroller scl sda os lm75 r1 10k r2 10k r3 10k gnd figure 7. i 2 c controlled temperature sensor 3v to 5.5v +v s os lm75 r2 10k r3 10k gnd 12v n-channel mosfet 12v 300ma fan motor figure 8. fan control figure 9. temperature sensor with audible alarm 3v to 5.5v os +v s max4364 r2 10k r3 10k r4 10k r1 10k gnd lm75 c1 0.1 f c2 0.1 f c4 6.8nf c5 6.8nf c3 6.8nf r5 200k shdn bias in+ in- out- gnd v cc out+
lm75 digital temperature sensor and thermal watchdog with 2-wire interface maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 12 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . chip information process: cmos package type package code document no. 8 so (sop) s8-2 21-0041 8 ?ax (?op) u8-1 21-0036

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